After an integrated circuit (IC) has been fabricated, it must be carefully tested to ensure that it meets the performance standards and specifications set by the manufacturer. Typically, an IC must perform its intended function correctly, and must perform within the parameters set forth on the manufacturer's data sheet for that IC. ICs that fail to perform as intended, or that fail to meet data sheet specifications are rejected and discarded.
An ideal test program would reject and discard only those ICs that failed to perform as intended (each “bad die”), and would permit every IC that performs within the manufacturer's specification (each “good die”) to pass. Unfortunately, limitations in test equipment and testing procedures can cause a manufacturer to reject and discard ICs that actually fall within acceptable performance standards, and accept ICs that should be rejected. Testing with the accuracy and precision necessary to reject every bad die and identify every good die may be impossible, too costly, or not feasible for other reasons. However, since there is a high cost associated with fabricating ICs, it is preferable not to reject or discard good dice. The challenge for manufacturers is to find cost-effective testing procedures.
Data sheets commonly specify output voltage levels, which are often governed by requirements of the input/output (I/O) standards an IC conforms to. One example of such a specification is VDL, which is the maximum voltage level that is acceptable as a logic low value, and which is usually stated with respect to a given current load or logic standard. Similarly, VOH is the minimum voltage level acceptable as a logic high. An IC adhering to many different logic and I/O standards can have many different specifications for VOL and VOH.
Prior art techniques for measuring VOL and VOH have been limited by the precision of the test equipment and by the parasitic effects of the connections between the IC and the test equipment. For example, a data sheet can specify VOL to be 400 mV (0.4 V) at a current of 24 mA. Normally, an IC being tested (also called a device under test, or “DUT”) is coupled to an ATE (automated test equipment) through various wires and traces. The ATE will inject the current (24 mA) into the DUT and probe the resulting voltage level. If the resulting voltage is below 400 mV, the IC is a good die. One problem is that the wires and traces coupling the ATE to the DUT can introduce significant parasitic resistance. If, for instance, the connection between the ATE and the DUT has a resistance of 2 Ω, the voltage drop through the connection at 24 mA is 48 mV, representing more than 10% of the total measurement. This means that an IC can have an actual VOL of 360 mV (well within spec), but the ATE can read a voltage of 408 mV (due to the resistance of the connection) and reject the part. This problem is exacerbated by logic standards that specify even higher current loads, such as 48 mA and beyond. Other factors such as noise can lead to even greater errors in the measurement. In these cases, the manufacturer can end up rejecting and discarding many good dice, thereby driving up the cost of manufacturing the IC.
Therefore, a need exists for precise and cost-effective testing of the output voltage characteristics of an IC.